16. With an RS latch a high S and low R sets the output to _____ ; a low S and a high R _____ the output to low.
A. No change, set
B. Race, high
C. high, reset
D. set, reset
E. None of the above
17. Flip-flop outputs are always
A. complimentary
B. the same
C. independent of each other
D. same as inputs
E. None of the above
18. The output 0 and 1 levels for TTL logic family is approximately
A. 0.1 and 5 V
B. 0.6 and 3.5 V
C. 0.9 and 1.75V
D. -1.75 and -0.9 V
E. None of the above
19. A _____ TTL device can sink up to 16mA and can source up to 400 MA.
A. Low-power
B. high-power
C. Standard
D. Schottky
E. None of the above
20. What is the 2’s complement of 0011 0101 1001 1100 number?
A. 1100 1010 1100 1011
B. 1100 1010 0110 0011
C. 1100 1010 0110 0100
D. 1100 1010 1111 1111
E. None of the above
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